IC Layout Design Engineer
IC Enable
Engineering
Found 1 month ago · Confirmed live 6 hours ago
Skills this job asks for
- Design Verification
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At a glance
- Type
- Not stated
- Level
- Not stated
- Experience
- 3-5 years
- Work model
- Not stated
- Schedule
- Not stated
- Education
- Bachelor's degree
- Benefits
- Not stated
- Travel
- None
Description
Expand on your career in Integrated Circuit Layout Design with IC Enable. The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the layout and verification on complex, high-performance circuits with applications such as PLL, HSC, AGC, SerDes, ADC/DAC, Wireless systems, and custom logic. This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is excited about growing his or her skillset in integrated circuit layout design and physical design.
- Richardson, TX (Hybrid; In Office 3 Days A Week)
- Remote eligibility available for qualified candidates, up to managements discretion
The best fit candidate for this position will have:
- 3-5 years experience in layout and verification tools and methodologies for RF/Analog/Mixed Signal ICs
- 3-5 years experience in Cadence layout (Virtuoso, VXL) and Calibre verification (ERC, DRC, LVS)
- Demonstrated success in delivering quality work product
- FinFET or GAA preferred, but not required
- Debugging and analytical skills with complex technical concepts
- Experience in DFM hierarchical layout construction for efficient verification and integration
- Must understand techniques for managing layout dependent effects i.e. IR drop, RC delay, electron-migration, self- heating and crosstalk
- Comprehensive understanding of matching, shielding, guard rings and latch up
- Proficiency in PERL or SKILL scripting is a plus
- Strong verbal and written communication
- Bachelor’s Degree in Electrical Engineering or Applicable Field
While working with our team you will be responsible for:
- Delivering on project assignments with integrity, commitment, and excellence
- Efficiently laying out sensitive RF, Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
- Identifying quality and reliability improvements in IC circuit and layout design
- Supporting or performing design verification from sub-block up through top-level
- Collaborating effectively with local and remote team members
- Developing accurate layout design schedules and resource estimates
- Proactively looking for continuous improvement opportunities in the flow, layout and design methodologies
IC Enable is an Equal Opportunity Employer
About IC Enable
IC Enable